2017-11-21 HPC Meeting Minutes

Attendance

Committee Members 

NamePresent
Kanta Vekaria (OCTO, Linaro)(tick)
Martin Stadtler (Director of LEG, Linaro)(tick)

Darren Cepulis (ARM)  

(tick) (error) 

Eric Van Hensbergen (ARM)(tick)      

Tianhong Ding (HiSilicon)

(tick)  

Larry Wikelius (Cavium)

(tick)  

Gary Yurcak (Qualcomm) 

(tick) (error) 

Scott Hara (Qualcomm)

(tick) (error) 

Hongbo (HXT)

(tick)

Jon Masters (RedHat)

(tick) (error) 

Takeharu Kato (Fujitsu)

(tick)

Koichi Hirai (Fujitsu)(tick)  


Guests 

NamePresent

David Rusling (CTO, Linaro) 

(tick) (error)

Andrea Gallo (VP of Segment Groups, Linaro)

(tick)  

Anoop Saxena (Project Manager, Segments)

(tick) (error) 

Francoise Ozog (Director of LNG, Linaro) 

(tick) (error) 

Renato Golin (Linaro)

(tick)  

ARM: Richard Sandiford, Will Lovett, Andy Wafaa, Ashok Bhat, Alan Hayward

(tick)  

Jakob Blomer(tick)

(tick)  


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Agenda 

  •  Lead Project Proposal: HPC Compiler Bootstrap

  • Please provide comments in this document: HPC Compiler Bootstrap

Minutes

(Renato) HPC Compiler Bootstrap

Ashok Bhat (Arm): Can you please share what hardware you have available now?

Renato: Right now we have Hisilicon and Cavium ThunderX 1 hardware, nothing yet from others. Not sure how relevant current platforms are, the focus of the work is about single core performance not multi-core and multi-thread.

AB] GCC compiler perfomance are we talking about the tip or the releases?

Renato: Depends on needs. Normally benchmarks are run on releases and that is something Linaro does already. LLVM normally follow trunk

(AB) will the results from one vendor be visible to other vendors?

(Kanta) we need to keep each platform as confidential, we will discuss with each vendor about which information they are willing to share. Very often we show information as percentage.

(Renato/Martin) We do not compare one platform to another. We show % of improvement vs previous compiler releases but not across different platforms. We usually show bars and graphs but not raw benchmarking numbers. We do spot regression tests immediately. If these are specific to one vendor / one microarchitecture, we inform immediately the vendor. If common to multiple vendors, we would work and identify the regression in the common code ourselves. We have HPE moonshot we can't share numbers can we share that there is a problem.

(AB) which benchmarks are you collecting?

(Kanta) as a SIG we prioritise based on input from the members.

(Renato) some are obvious, we should be running Spec17 We need to understand what we are benchmarking before run any old benchmarks

EricV : The complier stack Raja benchmark part of Coral 2 benchmark.  (https://asc.llnl.gov/coral-2-benchmarks/)

LarryW: important both QUALITY and OPTIMISATION. Optimisation side can be time consuming and for the resource we got we have to be careful where we put the time and resources into. Need to identify the hotsposts for optimisation and use the resources the right way.

Agree with Eric that we should understand other benchmarks that not being run elsewhere

Libraries may not be getting focus such as Lapack, FFTW

ThunderX2 on transit

Labs will give access to T1 and T2 later. We could use for a good CI loop and reference point. Does not have to HW in Linaro.

Ashok: FFTW is not being done by Arm only Blas Lapack for Arm's commercial compiler. Arm is not looking into any open source libraries.

Will Lovett:  Important to note the regression testing on the commercial compiler will be 6 months behind tip.


Kato: It is useful to use kernel loop programs cut from real applications are also useful to evaluate compilers. 

TianHong: Supports the proposal

Hongbo: Supports the proposal


Will follow up in subsequent weeks to firm up the proposal

Libraries will follow up with ARM and Larry first to identify what can be done there.


Arm HPC Workshop https://www.linaro.org/events/armhpcjapan2017/

65 registrants 

More session submission that slots

Agenda to be published by end of this week